Miniaturization, light-weighting, and high performance of electronic products are bound up with miniaturization, light-weighting, and high performance of electronic parts. To this end, designs and manufacturing technologies of semiconductors, and technologies of various semiconductor devices are developed.
A flip-chip technology is a representative one of these technologies. Particularly, the flip-chip technology using a conductive pillar that is longer and slimmer than a solder bump can achieve a fine pitch, and absorb a mechanical stress occurring between a semiconductor die and a circuit board to prevent a crack of the semiconductor die.
Furthermore, dielectrics having low dielectric constants are recently used in semiconductor dies to form more integrated circuits. The dielectrics having low dielectric constants, which reduce cross talk and/or resistance-capacitance (RC) between circuit patterns, are used for highly-integrated semiconductor dies.
However, since the dielectrics having low dielectric constants are hard and fragile, the dielectrics are susceptible to an internal or external stress. For example, a dielectric layer and/or a semiconductor die may be easily cracked by a stress due to a thermal expansion gradient between the semiconductor die and a circuit board. Although a conductive pillar absorbs the stress, the absorbance of the conductive pillar is limited in the semiconductor die including the dielectric having a low dielectric constant.
In the following description, the same or similar elements are labeled with the same or similar reference numbers.